1. Field of the Invention
This invention relates to charge pumps which supply closely matched up and down current pulses.
2. Description of Related Art
Charge pumps are commonly employed in phased-locked loops to control a voltage applied to a voltage controlled oscillator (VCO). FIG. 1 shows a typical application of a charge pump 120 in a phase-locked loop 100. Charge pump 120 controls a voltage Vout applied to a VCO 140. Voltage Vout depends on a current Ic to a filter 130. Current Ic is the difference between an up current Ip into a node 125 and a down current In out of node 125. A transistor 122 turns on and off a current source 124 that supplies up current Ip, charges node 125, and increases voltage Vout. A transistor 128 turns on and off a current source 126 that supplies down current In, discharges node 125, and decreases voltage Vout. Filter 130 reduces output voltage fluctuations caused by switching of up and down currents Ip and In.
A phase comparator or detector 110 provides control signals CNTRL.sub.-- P and CNTRL.sub.-- N for transistors 122 and 128 respectively. Phase comparator 110 compares a reference signal REF.sub.-- IN to a signal VCO.sub.-- IN which VCO 140 provides via an optional frequency divider 150. When the signals REF.sub.-- IN and VCO.sub.-- IN are in phase, phase-locked loop 100 is locked, and control signals CNTRL.sub.-- P and CNTRL.sub.-- N have matched duty cycle, phase, and frequency. Up and down currents Ip and In should be equal to maintain a constant output voltage Vout and constant frequency oscillation from VCO 140. If the signals REF.sub.-- IN and VCO.sub.-- IN are not in phase, phase comparator 110 changes the duty cycles of control signals CNTRL.sub.-- P or CNTRL.sub.-- N to change voltage Vout and change the frequency of oscillation of VCO 140. For example, when signal VCO.sub.-- IN trails reference signal REF.sub.-- IN, the duty cycle of control signal CNTRL.sub.-- P is increased relative to the duty cycle of control signal CNTRL.sub.-- N. The increased duty cycle increases the duration of up current Ip, charges node 125, increases voltage Vout, and increase the oscillation frequency of VCO 140.
Typically, in CMOS charge pumps, transistor 122 and current source 124 are P channel devices because P channel transistors handle supply voltage Vdd better, and transistor 128 and current source 126 are N channel devices because N channel devices handle reference voltage Vss better. P channel devices 122 and 124 and N channel devices 126 and 128 do not have identical responses to control voltages CNTRL.sub.-- P and CNTRL.sub.-- N because the charge carrier type used in current source 124 differs from the charge carrier type used in current source 126. Typically, P channel devices 122 and 124 are larger than N channel devices 126 and 128 to match the gain (also commonly referred to as .beta.) of devices 122, 124, 126, and 128. FIG. 2 shows predicted plots of currents Ip, In, and Ic verses time for charge pump 120 wherein P channel devices 122 and 124 have channel widths 2.5 times the channel width of N channel devices 126 and 128 to match the gains. In FIG. 2, control signals CNTRL.sub.-- P and CNTRL.sub.-- N are asserted between times 0.22.times.10.sup.-7 and 0.25.times.10.sup.-7 seconds. (Control signal CNTRL.sub.-- P is asserted low. Control signal CNTRL.sub.-- N is asserted high.) Currents Ip and In increase and decrease in response to the control signals in a manner characteristic of P channel devices 122 and 124 and N channel devices 126 and 128 respectively.
Current Ic is the difference between current Ip and current In. As shown in FIG. 2, when phase detector 110 provides equal duty cycle control signals to transistors 122 and 128, net current Ic flows to node 125 and increases voltage Vout. VCO 140 oscillates faster, and signal VCO.sub.-- IN gets out of phase with reference signal REF.sub.-- IN. Phase comparator 110 then changes control signals CNTRL.sub.-- P and CNTRL.sub.-- N and decreases voltage Vout until signals VCO.sub.-- IN and REF.sub.-- IN are in phase again. Once signals VCO.sub.-- IN and REF.sub.-- IN are in phase, control signals CNTRL.sub.-- P and CNTRL.sub.-- N are equal, and voltage Vout rises again as described above. Voltage Vout increases and decreases repeatedly in this manner causing jitter in the signal provided by VCO 140. The jitter may be unacceptable in applications where VCO 140 provides a precise timing or clock signal.
Another source of jitter in voltage Vout and the signal provided by VCO 140 is relative fluctuations between supply voltage Vdd or reference voltage Vss and gate voltages in devices 122, 124, 126, and 128. Such fluctuation vary the gate-source voltages for devices 122, 124, 126, and 128 and cause amplified fluctuations in output voltage Vout. A better charge pump is needed to provide less jitter.